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authorChenwandun <chenwandun@huawei.com>2019-11-07 09:39:49 +0800
committerDavid S. Miller <davem@davemloft.net>2019-11-06 21:50:06 -0800
commit2d791e3bf218a8880e306eb2fa79dcf1429d01b3 (patch)
treeb527d5eb732c9f7c97afc2767af59bc2b2e6a55b /drivers/net/ethernet/freescale/dpaa2/Kconfig
parentfdc66c3da93b6fa51192c4b33cf28c75b7141e67 (diff)
dpaa2-ptp: fix compile error
phylink_set_port_modes will be compiled if CONFIG_PHYLINK enabled, dpaa2_mac_validate will be compiled if CONFIG_FSL_DPAA2_ETH enabled, it should select CONFIG_PHYLINK when dpaa2_mac_validate call phylink_set_port_modes drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.o: In function `dpaa2_mac_validate': dpaa2-mac.c:(.text+0x3a1): undefined reference to `phylink_set_port_modes' drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.o: In function `dpaa2_mac_connect': dpaa2-mac.c:(.text+0x91a): undefined reference to `phylink_create' dpaa2-mac.c:(.text+0x94e): undefined reference to `phylink_of_phy_connect' dpaa2-mac.c:(.text+0x97f): undefined reference to `phylink_destroy' drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.o: In function `dpaa2_mac_disconnect': dpaa2-mac.c:(.text+0xa9f): undefined reference to `phylink_disconnect_phy' dpaa2-mac.c:(.text+0xab0): undefined reference to `phylink_destroy' make: *** [vmlinux] Error 1 Fixes: 719479230893 ("dpaa2-eth: add MAC/PHY support through phylink") Signed-off-by: Chenwandun <chenwandun@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/freescale/dpaa2/Kconfig')
-rw-r--r--drivers/net/ethernet/freescale/dpaa2/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/freescale/dpaa2/Kconfig b/drivers/net/ethernet/freescale/dpaa2/Kconfig
index fbef2829f3de..c6fb8e4021ac 100644
--- a/drivers/net/ethernet/freescale/dpaa2/Kconfig
+++ b/drivers/net/ethernet/freescale/dpaa2/Kconfig
@@ -2,6 +2,7 @@
config FSL_DPAA2_ETH
tristate "Freescale DPAA2 Ethernet"
depends on FSL_MC_BUS && FSL_MC_DPIO
+ select PHYLINK
help
This is the DPAA2 Ethernet driver supporting Freescale SoCs
with DPAA2 (DataPath Acceleration Architecture v2).