diff options
| author | Vivien Didelot <vivien.didelot@savoirfairelinux.com> | 2017-12-05 15:34:11 -0500 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2017-12-05 18:01:33 -0500 |
| commit | 0ea54ddaaa88dd6c0702149c59f5c1964936128d (patch) | |
| tree | 553252d04faa38671cf2edd02cb77e258c71394e /drivers/net/dsa | |
| parent | fa371c803c4fafbf088381aa1235ccde7dfa09dd (diff) | |
net: dsa: mv88e6xxx: setup global upstream port
Move the setup of the global upstream port within the
mv88e6xxx_setup_upstream_port function.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa')
| -rw-r--r-- | drivers/net/dsa/mv88e6xxx/chip.c | 29 |
1 files changed, 16 insertions, 13 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 77488b40cceb..e1c0bb24f5b2 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -1758,6 +1758,22 @@ static int mv88e6xxx_setup_upstream_port(struct mv88e6xxx_chip *chip, int port) return err; } + if (port == upstream_port) { + if (chip->info->ops->set_cpu_port) { + err = chip->info->ops->set_cpu_port(chip, + upstream_port); + if (err) + return err; + } + + if (chip->info->ops->set_egress_port) { + err = chip->info->ops->set_egress_port(chip, + upstream_port); + if (err) + return err; + } + } + return 0; } @@ -1959,21 +1975,8 @@ static int mv88e6xxx_set_ageing_time(struct dsa_switch *ds, static int mv88e6xxx_g1_setup(struct mv88e6xxx_chip *chip) { struct dsa_switch *ds = chip->ds; - u32 upstream_port = dsa_upstream_port(ds); int err; - if (chip->info->ops->set_cpu_port) { - err = chip->info->ops->set_cpu_port(chip, upstream_port); - if (err) - return err; - } - - if (chip->info->ops->set_egress_port) { - err = chip->info->ops->set_egress_port(chip, upstream_port); - if (err) - return err; - } - /* Disable remote management, and set the switch's DSA device number. */ err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL2, MV88E6XXX_G1_CTL2_MULTIPLE_CASCADE | |