summaryrefslogtreecommitdiff
path: root/drivers/mtd
diff options
context:
space:
mode:
authorPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>2017-06-09 16:27:21 +0530
committerBoris Brezillon <boris.brezillon@free-electrons.com>2017-06-20 09:17:25 +0200
commitd1ab0da84dcbac30a9039ccef72d69bf0a68bfc7 (patch)
treef158a7d3e7eaf34dbf40b557de0eb51d73799b95 /drivers/mtd
parent0d3a966d2b34f449df7859fa39e3db5b71da2bfa (diff)
mtd: nand: ifc: Initialize SRAM for all version >= 1.0
All IFC version >= 1.0 use 28nm technology for SRAM. Here SRAM has a requirement to initialize before any read operation performed for avoiding ECC Error. So update condition check to initialize SRAM for all IFC version >= 1.0.0 Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/fsl_ifc_nand.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index d1c4538f870f..59408ec2c69f 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -913,7 +913,7 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)
chip->ecc.algo = NAND_ECC_HAMMING;
}
- if (ctrl->version == FSL_IFC_VERSION_1_1_0)
+ if (ctrl->version >= FSL_IFC_VERSION_1_1_0)
fsl_ifc_sram_init(priv);
return 0;