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authorDavid S. Miller <davem@davemloft.net>2016-09-30 01:26:04 -0400
committerDavid S. Miller <davem@davemloft.net>2016-09-30 01:26:04 -0400
commitdf90a497047e41a67c0563e81496a2dc0d2f562d (patch)
tree5b48db1d60b9cc0ef7e1afbe6f531db431b1265a /drivers/mtd/nand
parent31fbe81fe3426dfb7f8056a7f5106c6b1841a9aa (diff)
parentee4dc2e75337e5925e9434f28ec48374a65ffcd9 (diff)
Merge branch 'dsa-global-cosmetics'
Vivien Didelot says: ==================== net: dsa: mv88e6xxx: Global (1) cosmetics The Global (1) internal SMI device of Marvell switches is a set of registers providing support to different units for MAC addresses (ATU), VLANs (VTU), PHY polling (PPU), etc. Chips (like 88E6060) may use a different address for it, or have subtleties in the units (e.g. different number of databases, changing how registers must be accessed), making it hard to maintain properly. This patchset is a first step to polish the Global (1) support, with no functional changes though. Here's basically what it does: - add helpers to access Global1 registers (same for Global2) - remove a few family checks (VTU/STU FID registers) - s/mv88e6xxx_vtu_stu_entry/mv88e6xxx_vtu_entry/ - add a per-chip mv88e6xxx_ops structure of function pointers: struct mv88e6xxx_ops { int (*get_eeprom)(struct mv88e6xxx_chip *chip, struct ethtool_eeprom *eeprom, u8 *data); int (*set_eeprom)(struct mv88e6xxx_chip *chip, struct ethtool_eeprom *eeprom, u8 *data); int (*set_switch_mac)(struct mv88e6xxx_chip *chip, u8 *addr); int (*phy_read)(struct mv88e6xxx_chip *chip, int addr, int reg, u16 *val); int (*phy_write)(struct mv88e6xxx_chip *chip, int addr, int reg, u16 val); }; Future patchsets will add ATU/VTU ops, software reset, etc. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/mtd/nand')
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