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authorRamuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>2020-11-10 09:23:33 +0800
committerMiquel Raynal <miquel.raynal@bootlin.com>2020-12-10 22:37:32 +0100
commit0b1039f016e8a37c779a4aee362cb2100ebb1cfd (patch)
tree77b10f2fd2de2d01ef178d437417159739fe829c /drivers/mtd/nand/raw/Makefile
parent2f9cea8eae44f53e931bf629138b034fec86c0b7 (diff)
mtd: rawnand: Add NAND controller support on Intel LGM SoC
This patch adds the new IP of Nand Flash Controller(NFC) support on Intel's Lightning Mountain(LGM) SoC. DMA is used for burst data transfer operation, also DMA HW supports aligned 32bit memory address and aligned data access by default. DMA burst of 8 supported. Data register used to support the read/write operation from/to device. Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20201110012333.18647-3-vadivel.muruganx.ramuthevar@linux.intel.com
Diffstat (limited to 'drivers/mtd/nand/raw/Makefile')
-rw-r--r--drivers/mtd/nand/raw/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
index dc38c087c693..9a63174df1b9 100644
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -56,6 +56,7 @@ obj-$(CONFIG_MTD_NAND_STM32_FMC2) += stm32_fmc2_nand.o
obj-$(CONFIG_MTD_NAND_MESON) += meson_nand.o
obj-$(CONFIG_MTD_NAND_CADENCE) += cadence-nand-controller.o
obj-$(CONFIG_MTD_NAND_ARASAN) += arasan-nand-controller.o
+obj-$(CONFIG_MTD_NAND_INTEL_LGM) += intel-nand-controller.o
nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o
nand-objs += nand_onfi.o