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authorMaxime Ripard <maxime.ripard@free-electrons.com>2017-01-27 22:38:39 +0100
committerUlf Hansson <ulf.hansson@linaro.org>2017-02-13 13:20:52 +0100
commit43c15e962c1240356a7e1aeca450d783dd903c55 (patch)
treea1442af3d40900ea30b16b087cf6249819eab7b9 /drivers/mmc/host
parent4fb3ce07eafa9d5945a1f36708557821a513b1b1 (diff)
mmc: sunxi: Add more debug informations
Add a bit more debug messages that can be helpful when debugging the clock setup. Also fill the actual_clock field in struct mmc_host to report properly the current frequency in debugfs. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host')
-rw-r--r--drivers/mmc/host/sunxi-mmc.c23
1 files changed, 19 insertions, 4 deletions
diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index f0f6922bca8a..6ffcd2838272 100644
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -661,6 +661,9 @@ static int sunxi_mmc_oclk_onoff(struct sunxi_mmc_host *host, u32 oclk_en)
unsigned long expire = jiffies + msecs_to_jiffies(750);
u32 rval;
+ dev_dbg(mmc_dev(host->mmc), "%sabling the clock\n",
+ oclk_en ? "en" : "dis");
+
rval = mmc_readl(host, REG_CLKCR);
rval &= ~(SDXC_CARD_CLOCK_ON | SDXC_LOW_POWER_ON | SDXC_MASK_DATA0);
@@ -737,6 +740,7 @@ static int sunxi_mmc_clk_set_phase(struct sunxi_mmc_host *host,
index = SDXC_CLK_50M_DDR;
}
} else {
+ dev_dbg(mmc_dev(host->mmc), "Invalid clock... returning\n");
return -EINVAL;
}
@@ -749,6 +753,7 @@ static int sunxi_mmc_clk_set_phase(struct sunxi_mmc_host *host,
static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host,
struct mmc_ios *ios)
{
+ struct mmc_host *mmc = host->mmc;
long rate;
u32 rval, clock = ios->clock;
int ret;
@@ -757,6 +762,9 @@ static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host,
if (ret)
return ret;
+ /* Our clock is gated now */
+ mmc->actual_clock = 0;
+
if (!ios->clock)
return 0;
@@ -767,17 +775,17 @@ static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host,
rate = clk_round_rate(host->clk_mmc, clock);
if (rate < 0) {
- dev_err(mmc_dev(host->mmc), "error rounding clk to %d: %ld\n",
+ dev_err(mmc_dev(mmc), "error rounding clk to %d: %ld\n",
clock, rate);
return rate;
}
- dev_dbg(mmc_dev(host->mmc), "setting clk to %d, rounded %ld\n",
+ dev_dbg(mmc_dev(mmc), "setting clk to %d, rounded %ld\n",
clock, rate);
/* setting clock rate */
ret = clk_set_rate(host->clk_mmc, rate);
if (ret) {
- dev_err(mmc_dev(host->mmc), "error setting clk to %ld: %d\n",
+ dev_err(mmc_dev(mmc), "error setting clk to %ld: %d\n",
rate, ret);
return ret;
}
@@ -812,7 +820,14 @@ static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host,
* least on the A64).
*/
- return sunxi_mmc_oclk_onoff(host, 1);
+ ret = sunxi_mmc_oclk_onoff(host, 1);
+ if (ret)
+ return ret;
+
+ /* And we just enabled our clock back */
+ mmc->actual_clock = rate;
+
+ return 0;
}
static void sunxi_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)