diff options
| author | Daniel Scheller <d.scheller@gmx.net> | 2018-06-23 11:36:15 -0400 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab+samsung@kernel.org> | 2018-07-30 16:23:12 -0400 |
| commit | 875658af666fb171f2b61a203281fde608bab24a (patch) | |
| tree | fbfb6dabc58291e587fe5ac09b9e695160947812 /drivers/media/pci | |
| parent | e1f84840fd13e5f7ef4c20e3e9d021a0d2f19e11 (diff) | |
media: ddbridge/mci: add SX8 I/Q mode remark and remove DIAG CMD defines
Take note that the SX8 IQ mode is only available on a single tuner, and
remove the MCI/SX8 DIAG CMD defines.
Picked up from the upstream dddvb GIT.
Signed-off-by: Daniel Scheller <d.scheller@gmx.net>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Diffstat (limited to 'drivers/media/pci')
| -rw-r--r-- | drivers/media/pci/ddbridge/ddbridge-mci.h | 24 |
1 files changed, 16 insertions, 8 deletions
diff --git a/drivers/media/pci/ddbridge/ddbridge-mci.h b/drivers/media/pci/ddbridge/ddbridge-mci.h index 600a8bc642c4..24241111c634 100644 --- a/drivers/media/pci/ddbridge/ddbridge-mci.h +++ b/drivers/media/pci/ddbridge/ddbridge-mci.h @@ -42,6 +42,22 @@ #define SX8_TSCONFIG_MODE_NORMAL (0x00000001) #define SX8_TSCONFIG_MODE_IQ (0x00000003) +/* + * IQMode is only available on MaxSX8 on a single tuner + * + * IQ_MODE_SAMPLES + * sampling rate is 1550/24 MHz (64.583 MHz) + * channel agc is frozen, to allow stitching the FFT results together + * + * IQ_MODE_VTM + * sampling rate is the supplied symbolrate + * channel agc is active + * + * in both cases down sampling is done with a RRC Filter (currently fixed to + * alpha = 0.05) which causes some (ca 5%) aliasing at the edges from + * outside the spectrum + */ + #define SX8_TSCONFIG_TSHEADER (0x00000004) #define SX8_TSCONFIG_BURST (0x00000008) @@ -82,14 +98,6 @@ #define MCI_SUCCESS(status) ((status & MCI_STATUS_UNSUPPORTED) == 0) -#define SX8_CMD_DIAG_READ8 (0xE0) -#define SX8_CMD_DIAG_READ32 (0xE1) -#define SX8_CMD_DIAG_WRITE8 (0xE2) -#define SX8_CMD_DIAG_WRITE32 (0xE3) - -#define SX8_CMD_DIAG_READRF (0xE8) -#define SX8_CMD_DIAG_WRITERF (0xE9) - struct mci_command { union { u32 command_word; |