diff options
| author | Mauro Carvalho Chehab <mchehab@s-opensource.com> | 2018-01-04 06:47:28 -0500 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@s-opensource.com> | 2018-01-04 13:12:01 -0500 |
| commit | 4a3fad709bbc74c85fffff8903d17b5e35723365 (patch) | |
| tree | ef1049fa2d66756b7920d0cb6059083745997e57 /drivers/media/i2c/cx25840 | |
| parent | 589266bdbf90527436fed95505522fd30d9a6d98 (diff) | |
media: fix usage of whitespaces and on indentation
On several places, whitespaces are being used for indentation,
or even at the end of the line.
Fix them.
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Diffstat (limited to 'drivers/media/i2c/cx25840')
| -rw-r--r-- | drivers/media/i2c/cx25840/cx25840-core.c | 6 | ||||
| -rw-r--r-- | drivers/media/i2c/cx25840/cx25840-ir.c | 4 |
2 files changed, 5 insertions, 5 deletions
diff --git a/drivers/media/i2c/cx25840/cx25840-core.c b/drivers/media/i2c/cx25840/cx25840-core.c index 2189980a0f29..4a9c137095fe 100644 --- a/drivers/media/i2c/cx25840/cx25840-core.c +++ b/drivers/media/i2c/cx25840/cx25840-core.c @@ -2065,10 +2065,10 @@ static void cx23885_dif_setup(struct i2c_client *client, u32 ifHz) /* Assuming TV */ /* Calculate the PLL frequency word based on the adjusted ifHz */ - pll_freq = div_u64((u64)ifHz * 268435456, 50000000); - pll_freq_word = (u32)pll_freq; + pll_freq = div_u64((u64)ifHz * 268435456, 50000000); + pll_freq_word = (u32)pll_freq; - cx25840_write4(client, DIF_PLL_FREQ_WORD, pll_freq_word); + cx25840_write4(client, DIF_PLL_FREQ_WORD, pll_freq_word); /* Round down to the nearest 100KHz */ ifHz = (ifHz / 100000) * 100000; diff --git a/drivers/media/i2c/cx25840/cx25840-ir.c b/drivers/media/i2c/cx25840/cx25840-ir.c index 9b65c7d2fa84..548382b2b2e6 100644 --- a/drivers/media/i2c/cx25840/cx25840-ir.c +++ b/drivers/media/i2c/cx25840/cx25840-ir.c @@ -131,7 +131,7 @@ static inline struct cx25840_ir_state *to_ir_state(struct v4l2_subdev *sd) * Rx and Tx Clock Divider register computations * * Note the largest clock divider value of 0xffff corresponds to: - * (0xffff + 1) * 1000 / 108/2 MHz = 1,213,629.629... ns + * (0xffff + 1) * 1000 / 108/2 MHz = 1,213,629.629... ns * which fits in 21 bits, so we'll use unsigned int for time arguments. */ static inline u16 count_to_clock_divider(unsigned int d) @@ -187,7 +187,7 @@ static inline unsigned int clock_divider_to_freq(unsigned int divider, * Low Pass Filter register calculations * * Note the largest count value of 0xffff corresponds to: - * 0xffff * 1000 / 108/2 MHz = 1,213,611.11... ns + * 0xffff * 1000 / 108/2 MHz = 1,213,611.11... ns * which fits in 21 bits, so we'll use unsigned int for time arguments. */ static inline u16 count_to_lpf_count(unsigned int d) |