diff options
| author | Rusty Russell <rusty@rustcorp.com.au> | 2007-07-17 23:34:16 +1000 |
|---|---|---|
| committer | Avi Kivity <avi@qumranet.com> | 2007-10-13 10:18:18 +0200 |
| commit | 66aee91aaab8f998d28a61ed7733be17ad8e6d8f (patch) | |
| tree | f3cd552c4a176cbba0929788b03867cb33d7b5b5 /drivers/kvm/svm.c | |
| parent | f802a307cb2cabdd0c6b48067dbe901d6fe27246 (diff) | |
KVM: Use standard CR4 flags, tighten checking
On this machine (Intel), writing to the CR4 bits 0x00000800 and
0x00001000 cause a GPF. The Intel manual is a little unclear, but
AFIACT they're reserved, too.
Also fix spelling of CR4_RESEVED_BITS.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Avi Kivity <avi@qumranet.com>
Diffstat (limited to 'drivers/kvm/svm.c')
| -rw-r--r-- | drivers/kvm/svm.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/kvm/svm.c b/drivers/kvm/svm.c index e920c2269af0..5c058fa1c8ad 100644 --- a/drivers/kvm/svm.c +++ b/drivers/kvm/svm.c @@ -38,7 +38,6 @@ MODULE_LICENSE("GPL"); #define DR7_GD_MASK (1 << 13) #define DR6_BD_MASK (1 << 13) -#define CR4_DE_MASK (1UL << 3) #define SEG_TYPE_LDT 2 #define SEG_TYPE_BUSY_TSS16 3 @@ -564,7 +563,7 @@ static void init_vmcb(struct vmcb *vmcb) * cache by default. the orderly way is to enable cache in bios. */ save->cr0 = 0x00000010 | X86_CR0_PG | X86_CR0_WP; - save->cr4 = CR4_PAE_MASK; + save->cr4 = X86_CR4_PAE; /* rdx = ?? */ } @@ -781,7 +780,7 @@ static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) { vcpu->cr4 = cr4; - vcpu->svm->vmcb->save.cr4 = cr4 | CR4_PAE_MASK; + vcpu->svm->vmcb->save.cr4 = cr4 | X86_CR4_PAE; } static void svm_set_segment(struct kvm_vcpu *vcpu, @@ -877,7 +876,7 @@ static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value, vcpu->svm->db_regs[dr] = value; return; case 4 ... 5: - if (vcpu->cr4 & CR4_DE_MASK) { + if (vcpu->cr4 & X86_CR4_DE) { *exception = UD_VECTOR; return; } |