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authorIcenowy Zheng <icenowy@aosc.io>2018-03-16 22:02:08 +0800
committerLinus Walleij <linus.walleij@linaro.org>2018-03-27 15:06:25 +0200
commit29dfc6bbcc5e1ef7ce1008c4713387efb8f567d2 (patch)
treea82af901a65b05b017648dd523b072fd29b0ed09 /drivers/isdn/hisax
parent4b0d6c5a0014beef5423a380f12b9411ebf0c907 (diff)
pinctrl: sunxi: introduce IRQ bank conversion function
The Allwinner H6 SoC have its pin controllers with the first IRQ-capable GPIO bank at IRQ bank 1 and the second bank at IRQ bank 5. Some refactors in the sunxi pinctrl framework are needed. This commit introduces a IRQ bank conversion function, which replaces the "(bank_base + bank)" code in IRQ register access. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/isdn/hisax')
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