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authorRobert Hancock <robert.hancock@calian.com>2021-04-23 12:58:53 -0600
committerMarc Zyngier <maz@kernel.org>2021-04-24 09:50:03 +0100
commitdebf69cfd4c618c7036a13cc4edd1faf87ce7d53 (patch)
tree5861a60dda4f83045e4532a0def5e0e45af4e2b9 /drivers/irqchip
parenta97709f563a078e259bf0861cd259aa60332890a (diff)
irqchip/xilinx: Expose Kconfig option for Zynq/ZynqMP
Previously the XILINX_INTC config option was hidden and only auto-selected on the MicroBlaze platform. However, this IP can also be used on the Zynq and ZynqMP platforms as a secondary cascaded controller. Allow this option to be user-enabled on those platforms. Signed-off-by: Robert Hancock <robert.hancock@calian.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210423185853.2556087-1-robert.hancock@calian.com
Diffstat (limited to 'drivers/irqchip')
-rw-r--r--drivers/irqchip/Kconfig7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 18b0d0b33b8b..c8f57e3e058d 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -279,8 +279,13 @@ config XTENSA_MX
select GENERIC_IRQ_EFFECTIVE_AFF_MASK
config XILINX_INTC
- bool
+ bool "Xilinx Interrupt Controller IP"
+ depends on MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP
select IRQ_DOMAIN
+ help
+ Support for the Xilinx Interrupt Controller IP core.
+ This is used as a primary controller with MicroBlaze and can also
+ be used as a secondary chained controller on other platforms.
config IRQ_CROSSBAR
bool