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| author | Yan Zhao <yan.y.zhao@intel.com> | 2019-05-07 22:16:44 -0400 |
|---|---|---|
| committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2019-05-21 10:58:07 +0800 |
| commit | e175a2520c7788a323ae93f04013b8fdaa552c69 (patch) | |
| tree | 5a5a208da5265469a9bde001d8a223aec7557b69 /drivers/irqchip/irq-pic32-evic.c | |
| parent | b6241002039118d6bea78f50f8f19195b41ab602 (diff) | |
drm/i915/gvt: do not let TRTTE and 0x4dfc write passthrough to hardware
the vGPU write on TRTTE and 0x4dfc is now write to vreg first. their
values all be restored hardware when context switching.
Fixes: e39c5add3221 ("drm/i915/gvt: vGPU MMIO virtualization")
Acked-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Yan Zhao <yan.y.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/irqchip/irq-pic32-evic.c')
0 files changed, 0 insertions, 0 deletions