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author | Yash Shah <yash.shah@sifive.com> | 2019-12-10 16:41:11 +0530 |
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committer | Marc Zyngier <maz@kernel.org> | 2020-01-20 09:24:56 +0000 |
commit | 466008f984358231f4608a0a4171b0e6e8251de8 (patch) | |
tree | 75bea705434000efbd09199c15fe22b651b9f735 /drivers/irqchip/Kconfig | |
parent | 459c3bc8c497d6b665c2efd15ee7df0f4e19452a (diff) |
irqchip/sifive-plic: Support irq domain hierarchy
Add support for hierarchical irq domains. This is needed as
pre-requisite for gpio-sifive driver.
Signed-off-by: Yash Shah <yash.shah@sifive.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/1575976274-13487-4-git-send-email-yash.shah@sifive.com
Diffstat (limited to 'drivers/irqchip/Kconfig')
-rw-r--r-- | drivers/irqchip/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 697e6a8ccaae..bb89dfc82c6e 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -490,6 +490,7 @@ config TI_SCI_INTA_IRQCHIP config SIFIVE_PLIC bool "SiFive Platform-Level Interrupt Controller" depends on RISCV + select IRQ_DOMAIN_HIERARCHY help This enables support for the PLIC chip found in SiFive (and potentially other) RISC-V systems. The PLIC controls devices |