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authorDinh Nguyen <dinguyen@opensource.altera.com>2015-06-02 21:14:02 -0500
committerKevin Hilman <khilman@linaro.org>2015-06-10 15:35:35 -0700
commit45be0cdb5323d6f2b4005a4d9263a72eac2040cd (patch)
treebc331c9bbffe4ea63a77452a12aeb57116fa992a /drivers/i2c/i2c-core.h
parent5f763ef80d4dff7f2aa519a31472b03499e2c2e1 (diff)
ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10
Add boot_secondary implementation for the Arria10 platform. Bringing up the secondary core on the Arria 10 platform is pretty similar to the Cyclone/Arria 5 platform, with the exception of the following differences: - Register offset to bringup CPU1 out of reset is different. - The cpu1-start-addr for Arria10 contains an additional nibble. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
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