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authorYongqiang Sun <yongqiang.sun@amd.com>2018-02-14 17:12:39 -0500
committerAlex Deucher <alexander.deucher@amd.com>2018-03-05 15:33:43 -0500
commitf03628232fe93ce7af18079ce69c2dfd4c95d70f (patch)
tree6e1e61ec36de04554d1679073fb7dd36dffa6abe /drivers/gpu
parentea7ea2a8cac1ae7224022b55dcafd51321474ad7 (diff)
drm/amd/display: Clear dmps off for eDP when resume.
This patch fixed secondary screen only S4 resume, eDP is unintentionally light up due to incorrect dpms off flag. When entering S4, dpms off flags are set to true via set power state. During resume, eDP is light up by vbios, so the flags should be changed to false to match the real state. By change the flag properly, eDP is able to be turned off properly as per OS request. This change may affect S3/S4 Shut down resume IOIC, need to verify those cases. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/amd/display/dc/core/dc_link.c4
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c6
2 files changed, 6 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 556b155ba5af..b7540152005b 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -2297,9 +2297,13 @@ void core_link_enable_stream(
if (pipe_ctx->stream->signal == SIGNAL_TYPE_EDP &&
core_dc->apply_edp_fast_boot_optimization) {
core_dc->apply_edp_fast_boot_optimization = false;
+ pipe_ctx->stream->dpms_off = false;
return;
}
+ if (pipe_ctx->stream->dpms_off)
+ return;
+
status = enable_link(state, pipe_ctx);
if (status != DC_OK) {
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index 0422c72a7579..73e0bcd5ba8f 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -1320,10 +1320,8 @@ static enum dc_status apply_single_controller_ctx_to_hw(
resource_build_info_frame(pipe_ctx);
dce110_update_info_frame(pipe_ctx);
- if (!pipe_ctx_old->stream) {
- if (!pipe_ctx->stream->dpms_off)
- core_link_enable_stream(context, pipe_ctx);
- }
+ if (!pipe_ctx_old->stream)
+ core_link_enable_stream(context, pipe_ctx);
pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0;