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authorBhaskar Chowdhury <unixbhaskar@gmail.com>2021-03-22 11:57:23 +0530
committerRob Clark <robdclark@chromium.org>2021-06-23 07:33:52 -0700
commit6bac5b13b4ec72f3b39e6d483154cc9f6dee6a03 (patch)
treef5fcb7e05aec351a2e27d17488f063c2ca3bf511 /drivers/gpu
parente020ac961ce5d038de66dc7f6ffca98899e9a3f3 (diff)
drm/msm/dpu: Fix a typo
s/struture/structure/ Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Link: https://lore.kernel.org/r/20210322062723.3215931-1-unixbhaskar@gmail.com Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
index 09a3fb3e89f5..bb9ceadeb0bb 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
@@ -343,7 +343,7 @@ enum dpu_3d_blend_mode {
/** struct dpu_format - defines the format configuration which
* allows DPU HW to correctly fetch and decode the format
- * @base: base msm_format struture containing fourcc code
+ * @base: base msm_format structure containing fourcc code
* @fetch_planes: how the color components are packed in pixel format
* @element: element color ordering
* @bits: element bit widths