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authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-07-11 00:31:06 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-07-20 12:21:38 +0200
commit4b4147c38f89dea536afc50a0a2d2ed005b49288 (patch)
tree9f7f062923294821eb2564e02dfe9fb042d7a50b /drivers/gpu
parent12f55818bac7b89c00e43504d12a45c47e49d282 (diff)
drm/i915: fix up PCH backlight #define mixup
I so totally suck. This can cause a black screen if (for whatever reason) the bios hasn't set this bit itself. This regression has been introduced in commit 7cf4160148136deb31ee5f2802857dd935a38529 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Tue Jun 5 10:07:09 2012 +0200 drm/i915: clear up backlight #define confusion on gen4+ Tested-by: Kenneth Graunke <kenneth@whitecape.org> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 7aa6e97c2c72..acc99b21e0b6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1900,7 +1900,7 @@
/* PCH CTL1 is totally different, all but the below bits are reserved. CTL2 is
* like the normal CTL from gen4 and earlier. Hooray for confusing naming. */
#define BLC_PWM_PCH_CTL1 0xc8250
-#define BLM_PCH_PWM_ENABLE (1 << 30)
+#define BLM_PCH_PWM_ENABLE (1 << 31)
#define BLM_PCH_OVERRIDE_ENABLE (1 << 30)
#define BLM_PCH_POLARITY (1 << 29)
#define BLC_PWM_PCH_CTL2 0xc8254