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authorZhi Wang <zhi.a.wang@intel.com>2017-12-29 02:50:08 +0800
committerZhenyu Wang <zhenyuw@linux.intel.com>2018-01-04 14:23:28 +0800
commit121d760d0788f95619049c63449d977065cab69d (patch)
tree386ce4f5f14d94013416994fe660ef26d20abdb3 /drivers/gpu
parentf5f00e7dcc4161f07b76ff1a854e8b1ea7a1ed41 (diff)
drm/i915/gvt: Clear the shadow page table entry after post-sync
A shadow page table entry needs to be cleared after being set as post-sync. This patch fixes the recent error reported in Win7-32 test. Fixes: 2707e4446688 ("drm/i915/gvt: vGPU graphics memory virtualization") Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> CC: Stable <stable@vger.kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/gvt/gtt.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
index 8e331142badb..64d67ff9bf08 100644
--- a/drivers/gpu/drm/i915/gvt/gtt.c
+++ b/drivers/gpu/drm/i915/gvt/gtt.c
@@ -1359,12 +1359,15 @@ static int ppgtt_handle_guest_write_page_table_bytes(void *gp,
return ret;
} else {
if (!test_bit(index, spt->post_shadow_bitmap)) {
+ int type = spt->shadow_page.type;
+
ppgtt_get_shadow_entry(spt, &se, index);
ret = ppgtt_handle_guest_entry_removal(gpt, &se, index);
if (ret)
return ret;
+ ops->set_pfn(&se, vgpu->gtt.scratch_pt[type].page_mfn);
+ ppgtt_set_shadow_entry(spt, &se, index);
}
-
ppgtt_set_post_shadow(spt, index);
}