diff options
| author | Jun Lei <Jun.Lei@amd.com> | 2019-06-03 11:37:44 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-07-18 14:18:08 -0500 |
| commit | ff4258d59031f783039127b90225320bcaa2625c (patch) | |
| tree | 18c62cccf7c54abaafc615332319d78612e3eb8c /drivers/gpu/drm | |
| parent | 6de202373bf6e0cea0f47c2f81274f713c22d84d (diff) | |
drm/amd/display: cap DCFCLK hardmin to 507 for NV10
[why]
Due to limitation in SMU/PPLIB, it is not possible to know Fmax @ Vmin for DCFCLK.
This causes issues at high display configurations where extra headroom of DCFCLK
can enable P-state switching
[how]
Use existing override logic. If override not defined, then force
min = 507
Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c index 51c45abb3b11..b57c42061870 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c @@ -2709,6 +2709,10 @@ static void update_bounding_box(struct dc *dc, struct _vcs_dpi_soc_bounding_box_ if (dc->bb_overrides.min_dcfclk_mhz > 0) min_dcfclk = dc->bb_overrides.min_dcfclk_mhz; + else + // Accounting for SOC/DCF relationship, we can go as high as + // 506Mhz in Vmin. We need to code 507 since SMU will round down to 506. + min_dcfclk = 507; for (i = 0; i < num_states; i++) { int min_fclk_required_by_uclk; |