diff options
| author | Rex Zhu <Rex.Zhu@amd.com> | 2016-08-11 16:51:41 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2016-09-19 13:22:13 -0400 |
| commit | fb044ed90c6f87dba95729a8deddcd860b16fec3 (patch) | |
| tree | 990592a62d6d4af0d0282daaab6fdc1ad7b6c3d2 /drivers/gpu/drm | |
| parent | 1486022088dea351805e4db4fc76c4d7c68733d6 (diff) | |
drm/amd/powerplay: use smu7_hwmgr to manager tonga.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/Makefile | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 32 |
2 files changed, 30 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/Makefile b/drivers/gpu/drm/amd/powerplay/hwmgr/Makefile index dffcd8af881e..69e6d156a4c3 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/Makefile +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/Makefile @@ -4,12 +4,10 @@ HARDWARE_MGR = hwmgr.o processpptables.o functiontables.o \ hardwaremanager.o pp_acpi.o cz_hwmgr.o \ - cz_clockpowergating.o tonga_powertune.o\ + cz_clockpowergating.o pppcielanes.o\ process_pptables_v1_0.o ppatomctrl.o \ - tonga_hwmgr.o pppcielanes.o tonga_thermal.o\ smu7_hwmgr.o smu7_powertune.o smu7_thermal.o \ smu7_clockpowergating.o iceland_hwmgr.o \ - tonga_clockpowergating.o \ iceland_clockpowergating.o iceland_thermal.o \ iceland_powertune.o diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c index 449780cf140d..7ca8aaa88444 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c @@ -36,13 +36,13 @@ #include "amd_acpi.h" extern int cz_hwmgr_init(struct pp_hwmgr *hwmgr); -extern int tonga_hwmgr_init(struct pp_hwmgr *hwmgr); extern int iceland_hwmgr_init(struct pp_hwmgr *hwmgr); static int polaris_set_asic_special_caps(struct pp_hwmgr *hwmgr); static void hwmgr_init_default_caps(struct pp_hwmgr *hwmgr); static int hwmgr_set_user_specify_caps(struct pp_hwmgr *hwmgr); static int fiji_set_asic_special_caps(struct pp_hwmgr *hwmgr); +static int tonga_set_asic_special_caps(struct pp_hwmgr *hwmgr); uint8_t convert_to_vid(uint16_t vddc) { @@ -82,9 +82,11 @@ int hwmgr_init(struct amd_pp_init *pp_init, struct pp_instance *handle) iceland_hwmgr_init(hwmgr); break; case CHIP_TONGA: - tonga_hwmgr_init(hwmgr); + smu7_hwmgr_init(hwmgr); + tonga_set_asic_special_caps(hwmgr); + hwmgr->feature_mask &= ~(PP_SMC_VOLTAGE_CONTROL_MASK | + PP_VBI_TIME_SUPPORT_MASK); break; - case CHIP_FIJI: smu7_hwmgr_init(hwmgr); fiji_set_asic_special_caps(hwmgr); @@ -768,3 +770,27 @@ int fiji_set_asic_special_caps(struct pp_hwmgr *hwmgr) return 0; } +int tonga_set_asic_special_caps(struct pp_hwmgr *hwmgr) +{ + phm_cap_unset(hwmgr->platform_descriptor.platformCaps, + PHM_PlatformCaps_SQRamping); + phm_cap_unset(hwmgr->platform_descriptor.platformCaps, + PHM_PlatformCaps_DBRamping); + phm_cap_unset(hwmgr->platform_descriptor.platformCaps, + PHM_PlatformCaps_TDRamping); + phm_cap_unset(hwmgr->platform_descriptor.platformCaps, + PHM_PlatformCaps_TCPRamping); + + phm_cap_unset(hwmgr->platform_descriptor.platformCaps, + PHM_PlatformCaps_UVDPowerGating); + phm_cap_unset(hwmgr->platform_descriptor.platformCaps, + PHM_PlatformCaps_VCEPowerGating); + + phm_cap_set(hwmgr->platform_descriptor.platformCaps, + PHM_PlatformCaps_TablelessHardwareInterface); + + phm_cap_set(hwmgr->platform_descriptor.platformCaps, + PHM_PlatformCaps_CAC); + + return 0; +} |