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authorKuogee Hsieh <khsieh@codeaurora.org>2021-06-03 08:40:46 -0700
committerRob Clark <robdclark@chromium.org>2021-06-23 07:33:53 -0700
commitf591dbb5fb8c82569378893b48f0ac9ebec78289 (patch)
treeaa658710a926fd26d52baa66b5728baf2723d333 /drivers/gpu/drm
parent0920b0f6e7b47526799d87ee273ea63e300488a0 (diff)
drm/msm/dp: power off DP phy at suspend
Normal DP suspend operation contains two steps, display off followed by dp suspend, to complete system wide suspending cycle if display is up at that time. In this case, DP phy will be powered off at display off. However there is an exception case that depending on the timing of dongle plug in during system wide suspending, sometimes display off procedure may be skipped and dp suspend was called directly. In this case, dp phy is stay at powered on (phy->power_count = 1) so that at next resume dp driver crash at main link clock enable due to phy is not physically powered on. This patch will call dp_ctrl_off_link_stream() to tear down main link and power off phy at dp_pm_suspend() if main link had been brought up. Changes in V2: -- stashed changes into dp_ctrl.c -- add is_phy_on to monitor phy state Changes in V3: -- delete is_phy_on -- call dp_ctrl_off_link_stream() from dp_pm_suspend() Changes in V4: -- delete changes made at dp_power.c -- move main link status checking to dp_pm_suspend Changes in V5: -- correct commit id at Fixes tag Fixes: 8dbde399044b ("drm/msm/dp: handle irq_hpd with sink_count = 0 correctly) Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org> Tested-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1622734846-14179-1-git-send-email-khsieh@codeaurora.org Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/msm/dp/dp_ctrl.c10
-rw-r--r--drivers/gpu/drm/msm/dp/dp_display.c7
2 files changed, 12 insertions, 5 deletions
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index 6f8ace7890fe..c25ffcd00f6a 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -1823,10 +1823,12 @@ int dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl)
dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false);
- ret = dp_power_clk_enable(ctrl->power, DP_STREAM_PM, false);
- if (ret) {
- DRM_ERROR("Failed to disable pixel clocks. ret=%d\n", ret);
- return ret;
+ if (dp_power_clk_status(ctrl->power, DP_STREAM_PM)) {
+ ret = dp_power_clk_enable(ctrl->power, DP_STREAM_PM, false);
+ if (ret) {
+ DRM_ERROR("Failed to disable pclk. ret=%d\n", ret);
+ return ret;
+ }
}
ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, false);
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
index 95ea8155f1de..051c1be1de7e 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -1326,8 +1326,13 @@ static int dp_pm_suspend(struct device *dev)
mutex_lock(&dp->event_mutex);
- if (dp->core_initialized == true)
+ if (dp->core_initialized == true) {
+ /* mainlink enabled */
+ if (dp_power_clk_status(dp->power, DP_CTRL_PM))
+ dp_ctrl_off_link_stream(dp->ctrl);
+
dp_display_host_deinit(dp);
+ }
dp->hpd_state = ST_SUSPENDED;