diff options
author | Rex Zhu <Rex.Zhu@amd.com> | 2018-03-02 10:52:25 +0800 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-03-05 15:39:12 -0500 |
commit | cc1bb66fbc26c29d360fab4b8d66fb7f278a2564 (patch) | |
tree | 06052d7b9b2d1da3593c5054639e61bcc211611e /drivers/gpu/drm | |
parent | ada6770e956b7f7d298bfef56fed457ade5bad9e (diff) |
drm/amd/pp: Export new smu message for PCC feature on Vega10
used to set PccThrottleLevel and PccResidencyThreshold
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/smu9.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu9.h b/drivers/gpu/drm/amd/powerplay/inc/smu9.h index 550ed675027a..70ac4d477be2 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/smu9.h +++ b/drivers/gpu/drm/amd/powerplay/inc/smu9.h @@ -58,7 +58,7 @@ #define FEATURE_FAST_PPT_BIT 26 #define FEATURE_GFX_EDC_BIT 27 #define FEATURE_ACG_BIT 28 -#define FEATURE_SPARE_29_BIT 29 +#define FEATURE_PCC_LIMIT_CONTROL_BIT 29 #define FEATURE_SPARE_30_BIT 30 #define FEATURE_SPARE_31_BIT 31 @@ -94,7 +94,7 @@ #define FEATURE_FAST_PPT_MASK (1 << FAST_PPT_BIT ) #define FEATURE_GFX_EDC_MASK (1 << FEATURE_GFX_EDC_BIT ) #define FEATURE_ACG_MASK (1 << FEATURE_ACG_BIT ) -#define FFEATURE_SPARE_29_MASK (1 << FEATURE_SPARE_29_BIT ) +#define FEATURE_PCC_LIMIT_CONTROL_MASK (1 << FEATURE_PCC_LIMIT_CONTROL_BIT ) #define FFEATURE_SPARE_30_MASK (1 << FEATURE_SPARE_30_BIT ) #define FFEATURE_SPARE_31_MASK (1 << FEATURE_SPARE_31_BIT ) /* Workload types */ |