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authorNavare, Manasi D <manasi.d.navare@intel.com>2017-06-29 18:14:01 -0700
committerJani Nikula <jani.nikula@intel.com>2017-07-03 16:12:57 +0300
commitc379b897ba1a7f786419e8c36a3438ce856f016a (patch)
treef1834bb6c5964635994844c47a5a01ddf6990c86 /drivers/gpu/drm
parent2347728934b501b07bea8b1b6e8fa27a56dc098f (diff)
drm/i915/cnl: Fix the CURSOR_COEFF_MASK used in DDI Vswing Programming
The Cursor Coeff is lower 6 bits in the PORT_TX_DW4 register and hence the CURSOR_COEFF_MASK should be (0x3F << 0) Fixes: 04416108ccea ("drm/i915/cnl: Add registers related to voltage swing sequences.") Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1498785241-21138-1-git-send-email-manasi.d.navare@intel.com (cherry picked from commit fcace3b9b727e25ffa3f7ad2c96e76b8584a9f3e) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c8647cfa81ba..64cc674b652a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1802,7 +1802,7 @@ enum skl_disp_power_wells {
#define POST_CURSOR_2(x) ((x) << 6)
#define POST_CURSOR_2_MASK (0x3F << 6)
#define CURSOR_COEFF(x) ((x) << 0)
-#define CURSOR_COEFF_MASK (0x3F << 6)
+#define CURSOR_COEFF_MASK (0x3F << 0)
#define _CNL_PORT_TX_DW5_GRP_AE 0x162354
#define _CNL_PORT_TX_DW5_GRP_B 0x1623D4