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authorjimqu <Jim.Qu@amd.com>2016-07-19 14:58:02 +0800
committerAlex Deucher <alexander.deucher@amd.com>2016-07-29 14:36:58 -0400
commitb7e2e9f709222687cc0178b31aa8a2a4e5b5f462 (patch)
tree27e591bf527f474d97f77e2909363343cc006871 /drivers/gpu/drm
parentd347ce66771582bac8d98e268e1db4a1d7e94e1b (diff)
drm/amdgpu: correct coding style
Signed-off-by: JimQu <Jim.Qu@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/vce_v3_0.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
index d7b8da433fe2..559209bb0083 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
@@ -210,11 +210,11 @@ static void vce_v3_0_set_vce_sw_clock_gating(struct amdgpu_device *adev,
static int vce_v3_0_firmware_loaded(struct amdgpu_device *adev)
{
int i, j;
- uint32_t status = 0;
for (i = 0; i < 10; ++i) {
for (j = 0; j < 100; ++j) {
- status = RREG32(mmVCE_STATUS);
+ uint32_t status = RREG32(mmVCE_STATUS);
+
if (status & VCE_STATUS_VCPU_REPORT_FW_LOADED_MASK)
return 0;
mdelay(10);