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authorSmita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>2020-11-19 12:29:38 -0600
committerBorislav Petkov <bp@suse.de>2020-11-21 12:05:41 +0100
commit4a24d80b8c3e9f89d6a6a7b89bd057c463b638d3 (patch)
tree1917ef2fe7729275fee986ebc53247a8b48dd82a /drivers/gpu/drm
parent098416e6986127f7e4c8ce4fd6bbbd80e55b0386 (diff)
x86/mce, cper: Pass x86 CPER through the MCA handling chain
The kernel uses ACPI Boot Error Record Table (BERT) to report fatal errors that occurred in a previous boot. The MCA errors in the BERT are reported using the x86 Processor Error Common Platform Error Record (CPER) format. Currently, the record prints out the raw MSR values and AMD relies on the raw record to provide MCA information. Extract the raw MSR values of MCA registers from the BERT and feed them into mce_log() to decode them properly. The implementation is SMCA-specific as the raw MCA register values are given in the register offset order of the SMCA address space. [ bp: Massage. ] [ Fix a build breakage in patch v1. ] Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp> Acked-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lkml.kernel.org/r/20201119182938.151155-1-Smita.KoralahalliChannabasappa@amd.com
Diffstat (limited to 'drivers/gpu/drm')
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