diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2018-11-29 19:35:14 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-12-07 17:24:14 -0500 |
| commit | 34c08da2097abe99cdc4757194f10a0c51148ce3 (patch) | |
| tree | aedb5137ec9b36e0d011bf326f85a37a64f23fc4 /drivers/gpu/drm | |
| parent | c6296f5a658974169261ed8fe75887e7552174af (diff) | |
drm/amdgpu/powerplay: check MC firmware for FFC support
Check if the MC firmware supports FFC and tell the SMC so
mclk switching is handled properly.
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c index 6bfbfd37ed92..d94c7d03bf24 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c @@ -4222,9 +4222,17 @@ static int smu7_check_mc_firmware(struct pp_hwmgr *hwmgr) if (tmp & (1 << 23)) { data->mem_latency_high = MEM_LATENCY_HIGH; data->mem_latency_low = MEM_LATENCY_LOW; + if ((hwmgr->chip_id == CHIP_POLARIS10) || + (hwmgr->chip_id == CHIP_POLARIS11) || + (hwmgr->chip_id == CHIP_POLARIS12)) + smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableFFC); } else { data->mem_latency_high = 330; data->mem_latency_low = 330; + if ((hwmgr->chip_id == CHIP_POLARIS10) || + (hwmgr->chip_id == CHIP_POLARIS11) || + (hwmgr->chip_id == CHIP_POLARIS12)) + smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisableFFC); } return 0; |