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authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>2019-03-15 10:31:50 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-04-10 13:53:28 -0500
commit004fefa385b42740a1773381bbf4795ec6b168f5 (patch)
tree8c64cfbef0a91937fe2208a11b809c8cb8d820e8 /drivers/gpu/drm
parent7ee3769a37d3f9d7352bb0182b0bf3a2beabe523 (diff)
drm/amd/display: Set surface color space from DRM plane state
[Why] We need DC's color space to match the color encoding and color space specified by userspace to correctly render YUV surfaces. [How] Convert the DRM color encoding and color range properties to the appropriate DC colorspace option and update the color space when performing surface updates. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c53
1 files changed, 52 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 06f58cd9e984..1db85cd8d0fb 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2744,6 +2744,50 @@ fill_blending_from_plane_state(struct drm_plane_state *plane_state,
}
}
+static int
+fill_plane_color_attributes(const struct drm_plane_state *plane_state,
+ const struct dc_plane_state *dc_plane_state,
+ enum dc_color_space *color_space)
+{
+ bool full_range;
+
+ *color_space = COLOR_SPACE_SRGB;
+
+ /* DRM color properties only affect non-RGB formats. */
+ if (dc_plane_state->format < SURFACE_PIXEL_FORMAT_VIDEO_BEGIN)
+ return 0;
+
+ full_range = (plane_state->color_range == DRM_COLOR_YCBCR_FULL_RANGE);
+
+ switch (plane_state->color_encoding) {
+ case DRM_COLOR_YCBCR_BT601:
+ if (full_range)
+ *color_space = COLOR_SPACE_YCBCR601;
+ else
+ *color_space = COLOR_SPACE_YCBCR601_LIMITED;
+ break;
+
+ case DRM_COLOR_YCBCR_BT709:
+ if (full_range)
+ *color_space = COLOR_SPACE_YCBCR709;
+ else
+ *color_space = COLOR_SPACE_YCBCR709_LIMITED;
+ break;
+
+ case DRM_COLOR_YCBCR_BT2020:
+ if (full_range)
+ *color_space = COLOR_SPACE_2020_YCBCR;
+ else
+ return -EINVAL;
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static int fill_plane_attributes(struct amdgpu_device *adev,
struct dc_plane_state *dc_plane_state,
struct drm_plane_state *plane_state,
@@ -2765,6 +2809,11 @@ static int fill_plane_attributes(struct amdgpu_device *adev,
if (ret)
return ret;
+ ret = fill_plane_color_attributes(plane_state, dc_plane_state,
+ &dc_plane_state->color_space);
+ if (ret)
+ return ret;
+
/*
* Always set input transfer function, since plane state is refreshed
* every time.
@@ -5015,8 +5064,10 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
bundle->scaling_infos[planes_count].clip_rect = dc_plane->clip_rect;
bundle->surface_updates[planes_count].scaling_info = &bundle->scaling_infos[planes_count];
+ fill_plane_color_attributes(
+ new_plane_state, dc_plane,
+ &bundle->plane_infos[planes_count].color_space);
- bundle->plane_infos[planes_count].color_space = dc_plane->color_space;
bundle->plane_infos[planes_count].format = dc_plane->format;
bundle->plane_infos[planes_count].plane_size = dc_plane->plane_size;
bundle->plane_infos[planes_count].rotation = dc_plane->rotation;