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author | Wei Yongjun <weiyongjun1@huawei.com> | 2020-07-25 06:34:29 +0000 |
---|---|---|
committer | Hyun Kwon <hyun.kwon@xilinx.com> | 2020-07-30 00:39:56 +0000 |
commit | 2d889db7626d2b6d67f402e2478b11f9a49b44e3 (patch) | |
tree | 7dcbe1f6ec365b4ece3b57b853a8e1444f0fc3b1 /drivers/gpu/drm/xlnx | |
parent | be13d94b7d7f1a3e7290573faa16267941917106 (diff) |
drm: xlnx: Fix typo in parameter description
Fix typo in parameter description.
Fixes: d76271d22694 ("drm: xlnx: DRM/KMS driver for Xilinx ZynqMP DisplayPort Subsystem")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200725063429.172139-1-weiyongjun1@huawei.com
Diffstat (limited to 'drivers/gpu/drm/xlnx')
-rw-r--r-- | drivers/gpu/drm/xlnx/zynqmp_dp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c index 0e1c818746eb..b735072a702d 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -44,7 +44,7 @@ MODULE_PARM_DESC(aux_timeout_ms, "DP aux timeout value in msec (default: 50)"); */ static uint zynqmp_dp_power_on_delay_ms = 4; module_param_named(power_on_delay_ms, zynqmp_dp_power_on_delay_ms, uint, 0444); -MODULE_PARM_DESC(aux_timeout_ms, "DP power on delay in msec (default: 4)"); +MODULE_PARM_DESC(power_on_delay_ms, "DP power on delay in msec (default: 4)"); /* Link configuration registers */ #define ZYNQMP_DP_LINK_BW_SET 0x0 |