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authorMaxime Ripard <maxime@cerno.tech>2020-06-11 15:36:51 +0200
committerMaxime Ripard <maxime@cerno.tech>2020-07-07 10:51:21 +0200
commit5fefc601a6c484ff2a3a6dc91f6310ca1224931a (patch)
tree68e299a60178c76fc27e92699df694ad388c0d61 /drivers/gpu/drm/vc4/vc4_crtc.c
parent811a850cbddef47623c5f6197154a05bb4efc7c9 (diff)
drm/vc4: crtc: Move the CRTC initialisation to a separate function
The upcoming patches to turn the TXP into a full-blown CRTC will have the same CRTC initialisation code, so let's move it into a separate, public, function so that we can reuse it later on. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Reviewed-by: Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/3a3026c0e7408895d154d8dea454cf6d1c459715.1591882579.git-series.maxime@cerno.tech
Diffstat (limited to 'drivers/gpu/drm/vc4/vc4_crtc.c')
-rw-r--r--drivers/gpu/drm/vc4/vc4_crtc.c87
1 files changed, 50 insertions, 37 deletions
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index f715736f668c..c0f86f3a68fc 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -876,6 +876,48 @@ vc4_crtc_get_cob_allocation(struct vc4_crtc *vc4_crtc)
vc4_crtc->cob_size = top - base + 4;
}
+int vc4_crtc_init(struct drm_device *drm, struct vc4_crtc *vc4_crtc,
+ const struct drm_crtc_funcs *crtc_funcs,
+ const struct drm_crtc_helper_funcs *crtc_helper_funcs)
+{
+ struct drm_crtc *crtc = &vc4_crtc->base;
+ struct drm_plane *primary_plane;
+ unsigned int i;
+
+ /* For now, we create just the primary and the legacy cursor
+ * planes. We should be able to stack more planes on easily,
+ * but to do that we would need to compute the bandwidth
+ * requirement of the plane configuration, and reject ones
+ * that will take too much.
+ */
+ primary_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_PRIMARY);
+ if (IS_ERR(primary_plane)) {
+ dev_err(drm->dev, "failed to construct primary plane\n");
+ return PTR_ERR(primary_plane);
+ }
+
+ drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL,
+ crtc_funcs, NULL);
+ drm_crtc_helper_add(crtc, crtc_helper_funcs);
+ vc4_crtc->channel = vc4_crtc->data->hvs_channel;
+ drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r));
+ drm_crtc_enable_color_mgmt(crtc, 0, false, crtc->gamma_size);
+
+ /* We support CTM, but only for one CRTC at a time. It's therefore
+ * implemented as private driver state in vc4_kms, not here.
+ */
+ drm_crtc_enable_color_mgmt(crtc, 0, true, crtc->gamma_size);
+ vc4_crtc_get_cob_allocation(vc4_crtc);
+
+ for (i = 0; i < crtc->gamma_size; i++) {
+ vc4_crtc->lut_r[i] = i;
+ vc4_crtc->lut_g[i] = i;
+ vc4_crtc->lut_b[i] = i;
+ }
+
+ return 0;
+}
+
static int vc4_crtc_bind(struct device *dev, struct device *master, void *data)
{
struct platform_device *pdev = to_platform_device(dev);
@@ -883,8 +925,8 @@ static int vc4_crtc_bind(struct device *dev, struct device *master, void *data)
const struct vc4_pv_data *pv_data;
struct vc4_crtc *vc4_crtc;
struct drm_crtc *crtc;
- struct drm_plane *primary_plane, *destroy_plane, *temp;
- int ret, i;
+ struct drm_plane *destroy_plane, *temp;
+ int ret;
vc4_crtc = devm_kzalloc(dev, sizeof(*vc4_crtc), GFP_KERNEL);
if (!vc4_crtc)
@@ -905,32 +947,11 @@ static int vc4_crtc_bind(struct device *dev, struct device *master, void *data)
vc4_crtc->regset.regs = crtc_regs;
vc4_crtc->regset.nregs = ARRAY_SIZE(crtc_regs);
- /* For now, we create just the primary and the legacy cursor
- * planes. We should be able to stack more planes on easily,
- * but to do that we would need to compute the bandwidth
- * requirement of the plane configuration, and reject ones
- * that will take too much.
- */
- primary_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_PRIMARY);
- if (IS_ERR(primary_plane)) {
- dev_err(dev, "failed to construct primary plane\n");
- ret = PTR_ERR(primary_plane);
- goto err;
- }
-
- drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL,
- &vc4_crtc_funcs, NULL);
- drm_crtc_helper_add(crtc, &vc4_crtc_helper_funcs);
- vc4_crtc->channel = vc4_crtc->data->hvs_channel;
- drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r));
- drm_crtc_enable_color_mgmt(crtc, 0, false, crtc->gamma_size);
-
- /* We support CTM, but only for one CRTC at a time. It's therefore
- * implemented as private driver state in vc4_kms, not here.
- */
- drm_crtc_enable_color_mgmt(crtc, 0, true, crtc->gamma_size);
-
- vc4_crtc_get_cob_allocation(vc4_crtc);
+ ret = vc4_crtc_init(drm, vc4_crtc,
+ &vc4_crtc_funcs, &vc4_crtc_helper_funcs);
+ if (ret)
+ return ret;
+ vc4_set_crtc_possible_masks(drm, crtc);
CRTC_WRITE(PV_INTEN, 0);
CRTC_WRITE(PV_INTSTAT, PV_INT_VFP_START);
@@ -939,14 +960,6 @@ static int vc4_crtc_bind(struct device *dev, struct device *master, void *data)
if (ret)
goto err_destroy_planes;
- vc4_set_crtc_possible_masks(drm, crtc);
-
- for (i = 0; i < crtc->gamma_size; i++) {
- vc4_crtc->lut_r[i] = i;
- vc4_crtc->lut_g[i] = i;
- vc4_crtc->lut_b[i] = i;
- }
-
platform_set_drvdata(pdev, vc4_crtc);
vc4_debugfs_add_regset32(drm, pv_data->debugfs_name,
@@ -960,7 +973,7 @@ err_destroy_planes:
if (destroy_plane->possible_crtcs == drm_crtc_mask(crtc))
destroy_plane->funcs->destroy(destroy_plane);
}
-err:
+
return ret;
}