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authorThierry Reding <thierry.reding@avionic-design.de>2013-01-15 12:21:36 +0100
committerThierry Reding <thierry.reding@avionic-design.de>2013-02-22 08:21:32 +0100
commit3b9e71eae5ac5ded28ad1dcded7c01ae73dd9581 (patch)
tree7cdcd07598792b00aa419d5e04130402cb4469e6 /drivers/gpu/drm/tegra
parent3c03c46ac80ea7edc3b8f2ba85085de54aec15cd (diff)
drm/tegra: Split DC_CMD_STATE_CONTROL register write
The Tegra TRM says that the ACT_REQ and UPDATE fields cannot be programmed at the same time so they are updated in two consecutive writes instead. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Diffstat (limited to 'drivers/gpu/drm/tegra')
-rw-r--r--drivers/gpu/drm/tegra/dc.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index c5d825fd25fe..20864002cf39 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -689,9 +689,10 @@ static void tegra_crtc_commit(struct drm_crtc *crtc)
struct tegra_dc *dc = to_tegra_dc(crtc);
unsigned long value;
- value = GENERAL_ACT_REQ | WIN_A_ACT_REQ |
- GENERAL_UPDATE | WIN_A_UPDATE;
+ value = GENERAL_UPDATE | WIN_A_UPDATE;
+ tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);
+ value = GENERAL_ACT_REQ | WIN_A_ACT_REQ;
tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);
drm_vblank_post_modeset(crtc->dev, dc->pipe);