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authorDave Airlie <airlied@redhat.com>2019-11-04 09:47:45 +1000
committerDave Airlie <airlied@redhat.com>2019-11-04 09:47:54 +1000
commit904ce198dd7bcf6eaa1735e9c0b06959351d4126 (patch)
tree7c8b9cfa64a005b94d567c911f6220b630bd6423 /drivers/gpu/drm/tegra/sor.h
parent633aa7e53a66b39b7205d4d2a221cda7eeb087c9 (diff)
parent84db889e6d827eefc3dde130fec8382d2dcb23ac (diff)
Merge tag 'drm/tegra/for-5.5-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next
drm/tegra: Changes for v5.5-rc1 The bulk of these changes is the addition of DisplayPort support for Tegra210, Tegra186 and Tegra194. I've been running versions of this for about three years now, so I'd consider these changes to be pretty mature. These changes also unify the existing eDP support with the DP support since the programming is very similar, except for a few steps that can be easily parameterized. The rest are a couple of fixes all over the place for minor issues, as well as some work to support the IOMMU-backed DMA API, which in the end turned out to also clean up a number of cases where the DMA API was not being used correctly. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thierry Reding <thierry.reding@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191102140116.3860545-1-thierry.reding@gmail.com
Diffstat (limited to 'drivers/gpu/drm/tegra/sor.h')
-rw-r--r--drivers/gpu/drm/tegra/sor.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/tegra/sor.h b/drivers/gpu/drm/tegra/sor.h
index f8efd8be4b7c..00e09d5dca30 100644
--- a/drivers/gpu/drm/tegra/sor.h
+++ b/drivers/gpu/drm/tegra/sor.h
@@ -39,6 +39,7 @@
#define SOR_STATE_ASY_CRC_MODE_NON_ACTIVE (0x2 << 6)
#define SOR_STATE_ASY_CRC_MODE_COMPLETE (0x1 << 6)
#define SOR_STATE_ASY_CRC_MODE_ACTIVE (0x0 << 6)
+#define SOR_STATE_ASY_SUBOWNER_MASK (0x3 << 4)
#define SOR_STATE_ASY_OWNER_MASK 0xf
#define SOR_STATE_ASY_OWNER(x) (((x) & 0xf) << 0)
@@ -283,10 +284,12 @@
#define SOR_DP_PADCTL_CM_TXD_2 (1 << 6)
#define SOR_DP_PADCTL_CM_TXD_1 (1 << 5)
#define SOR_DP_PADCTL_CM_TXD_0 (1 << 4)
+#define SOR_DP_PADCTL_CM_TXD(x) (1 << (4 + (x)))
#define SOR_DP_PADCTL_PD_TXD_3 (1 << 3)
#define SOR_DP_PADCTL_PD_TXD_0 (1 << 2)
#define SOR_DP_PADCTL_PD_TXD_1 (1 << 1)
#define SOR_DP_PADCTL_PD_TXD_2 (1 << 0)
+#define SOR_DP_PADCTL_PD_TXD(x) (1 << (0 + (x)))
#define SOR_DP_PADCTL1 0x5d