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authorJean Delvare <jdelvare@suse.de>2012-01-28 11:08:58 +0100
committerDave Airlie <airlied@redhat.com>2012-02-03 09:34:32 +0000
commit9048955748aa14b1dbf068ef3a9288ec15cabc66 (patch)
treed1a58bbf7799a889722df7cca5ac087160695a30 /drivers/gpu/drm/radeon
parent1849ecb22fb3b5d57b65e7369a3957adf9f26f39 (diff)
drm/radeon/kms: Use the standard VESA timeout for DDC channels
The VESA specification suggests a 2.2 ms timeout on DDC channels. Use exactly that (as the i915 driver does) instead of hard-coding a jiffy count. Signed-off-by: Jean Delvare <jdelvare@suse.de> Reviewed-by: Keith Packard <keithp@keithp.com> Reviewed-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon')
-rw-r--r--drivers/gpu/drm/radeon/radeon_i2c.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_i2c.c b/drivers/gpu/drm/radeon/radeon_i2c.c
index b7ec89bf3939..c47f222f7442 100644
--- a/drivers/gpu/drm/radeon/radeon_i2c.c
+++ b/drivers/gpu/drm/radeon/radeon_i2c.c
@@ -926,9 +926,7 @@ struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
i2c->algo.bit.getsda = get_data;
i2c->algo.bit.getscl = get_clock;
i2c->algo.bit.udelay = 10;
- /* vesa says 2.2 ms is enough, 1 jiffy doesn't seem to always
- * make this, 2 jiffies is a lot more reliable */
- i2c->algo.bit.timeout = 2;
+ i2c->algo.bit.timeout = usecs_to_jiffies(2200); /* from VESA */
i2c->algo.bit.data = i2c;
ret = i2c_bit_add_bus(&i2c->adapter);
if (ret) {