diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2014-01-27 11:54:44 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2014-01-29 15:23:05 -0500 |
| commit | e9a321c6b2ac954a7dbf235f419c255a424a1273 (patch) | |
| tree | 00f898ea95a749b64b284c375566055f7ee7cc65 /drivers/gpu/drm/radeon/si.c | |
| parent | 50efa51afddb50a6ab47ee15614fcf180130888c (diff) | |
drm/radeon: fix DAC interrupt handling on DCE5+
DCE5 and newer hardware only has 1 DAC. Use the correct
offset. This may fix display problems on certain board
configurations.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu/drm/radeon/si.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/si.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index e641725ae543..09ec4f6c53bb 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -5682,7 +5682,7 @@ static void si_disable_interrupt_state(struct radeon_device *rdev) } if (!ASIC_IS_NODCE(rdev)) { - WREG32(DACA_AUTODETECT_INT_CONTROL, 0); + WREG32(DAC_AUTODETECT_INT_CONTROL, 0); tmp = RREG32(DC_HPD1_INT_CONTROL) & DC_HPDx_INT_POLARITY; WREG32(DC_HPD1_INT_CONTROL, tmp); |