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authorSteve Capper <steve.capper@linaro.org>2014-07-02 11:46:23 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2014-07-04 14:26:01 +0100
commit923b8f5044da753e4985ab15c1374ced2cdf616c (patch)
tree88431052c2658f46641708089975417bd981e86d /drivers/gpu/drm/radeon/radeon_display.c
parentf3b766a26dd490026b9eb91a9136ade9f49fc674 (diff)
arm64: mm: Make icache synchronisation logic huge page aware
The __sync_icache_dcache routine will only flush the dcache for the first page of a compound page, potentially leading to stale icache data residing further on in a hugetlb page. This patch addresses this issue by taking into consideration the order of the page when flushing the dcache. Reported-by: Mark Brown <broonie@linaro.org> Tested-by: Mark Brown <broonie@linaro.org> Signed-off-by: Steve Capper <steve.capper@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: <stable@vger.kernel.org> # v3.11+
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_display.c')
0 files changed, 0 insertions, 0 deletions