drm/nouveau/fbcon: convert accel_init() to new push macros

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

1 files changed, 53 insertions, 62 deletions

diff --git a/drivers/gpu/drm/nouveau/nv50_fbcon.c b/drivers/gpu/drm/nouveau/nv50_fbcon.c
index 31d8dca54f9f..36348f72ecb3 100644
--- a/drivers/gpu/drm/nouveau/nv50_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nv50_fbcon.c
@@ -21,12 +21,14 @@
  *
  * Authors: Ben Skeggs
  */
-
+#define NVIF_DEBUG_PRINT_DISABLE
 #include "nouveau_drv.h"
 #include "nouveau_dma.h"
 #include "nouveau_fbcon.h"
 #include "nouveau_vmm.h"
 
+#include <nvif/push206e.h>
+
 int
 nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 {
@@ -152,6 +154,7 @@ nv50_fbcon_accel_init(struct fb_info *info)
 	struct drm_device *dev = nfbdev->helper.dev;
 	struct nouveau_drm *drm = nouveau_drm(dev);
 	struct nouveau_channel *chan = drm->channel;
+	struct nvif_push *push = chan->chan.push;
 	int ret, format;
 
 	switch (info->var.bits_per_pixel) {
@@ -186,72 +189,60 @@ nv50_fbcon_accel_init(struct fb_info *info)
 	if (ret)
 		return ret;
 
-	ret = RING_SPACE(chan, 58);
+	ret = PUSH_WAIT(push, 56);
 	if (ret) {
 		nouveau_fbcon_gpu_lockup(info);
 		return ret;
 	}
 
-	BEGIN_NV04(chan, NvSub2D, 0x0000, 1);
-	OUT_RING(chan, nfbdev->twod.handle);
-	BEGIN_NV04(chan, NvSub2D, 0x0184, 3);
-	OUT_RING(chan, chan->vram.handle);
-	OUT_RING(chan, chan->vram.handle);
-	OUT_RING(chan, chan->vram.handle);
-	BEGIN_NV04(chan, NvSub2D, 0x0290, 1);
-	OUT_RING(chan, 0);
-	BEGIN_NV04(chan, NvSub2D, 0x0888, 1);
-	OUT_RING(chan, 1);
-	BEGIN_NV04(chan, NvSub2D, 0x02ac, 1);
-	OUT_RING(chan, 3);
-	BEGIN_NV04(chan, NvSub2D, 0x02a0, 1);
-	OUT_RING(chan, 0x55);
-	BEGIN_NV04(chan, NvSub2D, 0x08c0, 4);
-	OUT_RING(chan, 0);
-	OUT_RING(chan, 1);
-	OUT_RING(chan, 0);
-	OUT_RING(chan, 1);
-	BEGIN_NV04(chan, NvSub2D, 0x0580, 2);
-	OUT_RING(chan, 4);
-	OUT_RING(chan, format);
-	BEGIN_NV04(chan, NvSub2D, 0x02e8, 2);
-	OUT_RING(chan, 2);
-	OUT_RING(chan, 1);
-	BEGIN_NV04(chan, NvSub2D, 0x0804, 1);
-	OUT_RING(chan, format);
-	BEGIN_NV04(chan, NvSub2D, 0x0800, 1);
-	OUT_RING(chan, 1);
-	BEGIN_NV04(chan, NvSub2D, 0x0808, 3);
-	OUT_RING(chan, 0);
-	OUT_RING(chan, 0);
-	OUT_RING(chan, 1);
-	BEGIN_NV04(chan, NvSub2D, 0x081c, 1);
-	OUT_RING(chan, 1);
-	BEGIN_NV04(chan, NvSub2D, 0x0840, 4);
-	OUT_RING(chan, 0);
-	OUT_RING(chan, 1);
-	OUT_RING(chan, 0);
-	OUT_RING(chan, 1);
-	BEGIN_NV04(chan, NvSub2D, 0x0200, 2);
-	OUT_RING(chan, format);
-	OUT_RING(chan, 1);
-	BEGIN_NV04(chan, NvSub2D, 0x0214, 5);
-	OUT_RING(chan, info->fix.line_length);
-	OUT_RING(chan, info->var.xres_virtual);
-	OUT_RING(chan, info->var.yres_virtual);
-	OUT_RING(chan, upper_32_bits(nfbdev->vma->addr));
-	OUT_RING(chan, lower_32_bits(nfbdev->vma->addr));
-	BEGIN_NV04(chan, NvSub2D, 0x0230, 2);
-	OUT_RING(chan, format);
-	OUT_RING(chan, 1);
-	BEGIN_NV04(chan, NvSub2D, 0x0244, 5);
-	OUT_RING(chan, info->fix.line_length);
-	OUT_RING(chan, info->var.xres_virtual);
-	OUT_RING(chan, info->var.yres_virtual);
-	OUT_RING(chan, upper_32_bits(nfbdev->vma->addr));
-	OUT_RING(chan, lower_32_bits(nfbdev->vma->addr));
-	FIRE_RING(chan);
-
+	PUSH_NVSQ(push, NV502D, 0x0000, nfbdev->twod.handle);
+	PUSH_NVSQ(push, NV502D, 0x0184, chan->vram.handle,
+				0x0188, chan->vram.handle,
+				0x018c, chan->vram.handle);
+
+	PUSH_NVSQ(push, NV502D, 0x0200, format,
+				0x0204, 1);
+	PUSH_NVSQ(push, NV502D, 0x0214, info->fix.line_length,
+				0x0218, info->var.xres_virtual,
+				0x021c, info->var.yres_virtual,
+				0x0220, upper_32_bits(nfbdev->vma->addr),
+				0x0224, lower_32_bits(nfbdev->vma->addr));
+
+	PUSH_NVSQ(push, NV502D, 0x0230, format,
+				0x0234, 1);
+	PUSH_NVSQ(push, NV502D, 0x0244, info->fix.line_length,
+				0x0248, info->var.xres_virtual,
+				0x024c, info->var.yres_virtual,
+				0x0250, upper_32_bits(nfbdev->vma->addr),
+				0x0254, lower_32_bits(nfbdev->vma->addr));
+
+	PUSH_NVSQ(push, NV502D, 0x0290, 0);
+	PUSH_NVSQ(push, NV502D, 0x02a0, 0x55);
+	PUSH_NVSQ(push, NV502D, 0x02ac, 3);
+	PUSH_NVSQ(push, NV502D, 0x02e8, 2,
+				0x02ec, 1);
+
+	PUSH_NVSQ(push, NV502D, 0X0580, 4,
+				0x0584, format);
+
+	PUSH_NVSQ(push, NV502D, 0x0800, 1,
+				0x0804, format,
+				0x0808, 0,
+				0x080c, 0,
+				0x0810, 1);
+	PUSH_NVSQ(push, NV502D, 0x081c, 1);
+	PUSH_NVSQ(push, NV502D, 0x0840, 0,
+				0x0844, 1,
+				0x0848, 0,
+				0x084c, 1);
+
+	PUSH_NVSQ(push, NV502D, 0x0888, 1);
+	PUSH_NVSQ(push, NV502D, 0x08c0, 0,
+				0x08c4, 1,
+				0x08c8, 0,
+				0x08cc, 1);
+
+	PUSH_KICK(push);
 	return 0;
 }