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authorBen Skeggs <bskeggs@redhat.com>2020-07-20 11:19:26 +1000
committerBen Skeggs <bskeggs@redhat.com>2020-07-24 18:51:04 +1000
commit40f1171e7c26e57d71aa2800fb8ad213b4efb09c (patch)
tree363a4be2f17938c19bfdebd11ff5c8f91642072a /drivers/gpu/drm/nouveau/nouveau_dma.h
parent60cdadace3208001b4e24a1a4b102f767d5df3c2 (diff)
drm/nouveau/fence: use NVIDIA's headers for sync()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_dma.h')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_dma.h14
1 files changed, 0 insertions, 14 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.h b/drivers/gpu/drm/nouveau/nouveau_dma.h
index ebe63396ff8b..035a709c7be1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dma.h
+++ b/drivers/gpu/drm/nouveau/nouveau_dma.h
@@ -103,20 +103,6 @@ WIND_RING(struct nouveau_channel *chan)
chan->dma.cur = chan->dma.put;
}
-/* FIFO methods */
-#define NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH 0x00000010
-#define NV84_SUBCHAN_SEMAPHORE_ADDRESS_LOW 0x00000014
-#define NV84_SUBCHAN_SEMAPHORE_SEQUENCE 0x00000018
-#define NV84_SUBCHAN_SEMAPHORE_TRIGGER 0x0000001c
-#define NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_EQUAL 0x00000001
-#define NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG 0x00000002
-#define NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_GEQUAL 0x00000004
-#define NVC0_SUBCHAN_SEMAPHORE_TRIGGER_YIELD 0x00001000
-#define NV11_SUBCHAN_DMA_SEMAPHORE 0x00000060
-#define NV11_SUBCHAN_SEMAPHORE_OFFSET 0x00000064
-#define NV11_SUBCHAN_SEMAPHORE_ACQUIRE 0x00000068
-#define NV11_SUBCHAN_SEMAPHORE_RELEASE 0x0000006c
-
/* NV_SW object class */
#define NV_SW_DMA_VBLSEM 0x0000018c
#define NV_SW_VBLSEM_OFFSET 0x00000400