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authorBen Skeggs <bskeggs@redhat.com>2018-12-11 14:50:02 +1000
committerBen Skeggs <bskeggs@redhat.com>2018-12-11 15:37:47 +1000
commit302daab1a7b1206d33a9191d5b42ce606ed46e21 (patch)
tree2c3e1bd9ddf54c03e5302c0f52529540bfe41bce /drivers/gpu/drm/nouveau/include
parent03da9faae1562746e85f1a5e94e4c50a3b85b6b5 (diff)
drm/nouveau/fifo/gf100-: call into BAR to reset BARs after MMU fault
This is needed for Turing, but we're supposed to wait for completion after re-writing the value on older GPUs anyway. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/include')
-rw-r--r--drivers/gpu/drm/nouveau/include/nvkm/subdev/bar.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/bar.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bar.h
index f6bd94c7e0f7..18dd10aaf857 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/bar.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bar.h
@@ -16,8 +16,10 @@ struct nvkm_bar {
};
struct nvkm_vmm *nvkm_bar_bar1_vmm(struct nvkm_device *);
+void nvkm_bar_bar1_reset(struct nvkm_device *);
void nvkm_bar_bar2_init(struct nvkm_device *);
void nvkm_bar_bar2_fini(struct nvkm_device *);
+void nvkm_bar_bar2_reset(struct nvkm_device *);
struct nvkm_vmm *nvkm_bar_bar2_vmm(struct nvkm_device *);
void nvkm_bar_flush(struct nvkm_bar *);