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authorStephane Viau <sviau@codeaurora.org>2015-03-24 09:30:02 -0400
committerRob Clark <robdclark@gmail.com>2015-04-01 19:29:37 -0400
commit531db9ff3d3aabc36772bb02a9c636e398d0f21c (patch)
tree3b4b301dce47578d3c567dd00e689d4ad6aae847 /drivers/gpu/drm/msm
parent87ed66c41441589b9718331410ceea7aeb8a740b (diff)
drm/msm/mdp5: Remove CTL flush dummy bits
This TODO can now be removed and replaced by the previous patch "drm/msm/mdp5: Update headers (add CTL flush bits)" Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm')
-rw-r--r--drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.c11
1 files changed, 0 insertions, 11 deletions
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.c
index 0fa7fcefd7eb..5488b687c8d1 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.c
@@ -316,13 +316,6 @@ int mdp5_ctl_blend(struct mdp5_ctl *ctl, u32 lm, u32 blend_cfg)
u32 mdp_ctl_flush_mask_encoder(struct mdp5_interface *intf)
{
- /* these are dummy bits for now, but will appear in next chipsets: */
-#define MDP5_CTL_FLUSH_TIMING_0 0x80000000
-#define MDP5_CTL_FLUSH_TIMING_1 0x40000000
-#define MDP5_CTL_FLUSH_TIMING_2 0x20000000
-#define MDP5_CTL_FLUSH_TIMING_3 0x10000000
-#define MDP5_CTL_FLUSH_WB 0x00010000
-
if (intf->type == INTF_WB)
return MDP5_CTL_FLUSH_WB;
@@ -337,10 +330,6 @@ u32 mdp_ctl_flush_mask_encoder(struct mdp5_interface *intf)
u32 mdp_ctl_flush_mask_cursor(int cursor_id)
{
- /* these are dummy bits for now, but will appear in next chipsets: */
-#define MDP5_CTL_FLUSH_CURSOR_0 0x00400000
-#define MDP5_CTL_FLUSH_CURSOR_1 0x00800000
-
switch (cursor_id) {
case 0: return MDP5_CTL_FLUSH_CURSOR_0;
case 1: return MDP5_CTL_FLUSH_CURSOR_1;