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authorArchit Taneja <architt@codeaurora.org>2017-03-23 15:57:54 +0530
committerRob Clark <robdclark@gmail.com>2017-04-08 06:59:33 -0400
commit01f8a9696419133ff4305024f3211f095025d130 (patch)
treeee11f9844cf10f2e20207b8edcfece77ffcb44fc /drivers/gpu/drm/msm/mdp/mdp5
parent1225bb2b45f1c03dfdf29ab3b4cf065ab6da246f (diff)
drm/msm/mdp5: Bring back pipe_lock to mdp5_plane struct
We'd previously moved the pipe_lock spinlock to the hwpipe struct. Bring it back to mdp5_plane. We will need this because an mdp5_plane in the future could comprise of 2 hw pipes. It makes more sense to have a single lock to protect the registers for the hw pipes used by a plane, rather than trying to take individual locks per hwpipe when committing a configuration. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/mdp/mdp5')
-rw-r--r--drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.c2
-rw-r--r--drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.h1
-rw-r--r--drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c9
3 files changed, 7 insertions, 5 deletions
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.c
index 35c4dabb0c0c..2bfac3712685 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.c
@@ -135,7 +135,5 @@ struct mdp5_hw_pipe *mdp5_pipe_init(enum mdp5_pipe pipe,
hwpipe->caps = caps;
hwpipe->flush_mask = mdp_ctl_flush_mask_pipe(pipe);
- spin_lock_init(&hwpipe->pipe_lock);
-
return hwpipe;
}
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.h b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.h
index 238901987e00..924c3e6f9517 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.h
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.h
@@ -28,7 +28,6 @@ struct mdp5_hw_pipe {
const char *name;
enum mdp5_pipe pipe;
- spinlock_t pipe_lock; /* protect REG_MDP5_PIPE_* registers */
uint32_t reg_offset;
uint32_t caps;
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
index 60a5451ae0b9..49e50debda90 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
@@ -22,6 +22,8 @@
struct mdp5_plane {
struct drm_plane base;
+ spinlock_t pipe_lock; /* protect REG_MDP5_PIPE_* registers */
+
uint32_t nformats;
uint32_t formats[32];
};
@@ -719,6 +721,7 @@ static int mdp5_plane_mode_set(struct drm_plane *plane,
struct drm_crtc *crtc, struct drm_framebuffer *fb,
struct drm_rect *src, struct drm_rect *dest)
{
+ struct mdp5_plane *mdp5_plane = to_mdp5_plane(plane);
struct drm_plane_state *pstate = plane->state;
struct mdp5_hw_pipe *hwpipe = to_mdp5_plane_state(pstate)->hwpipe;
struct mdp5_kms *mdp5_kms = get_kms(plane);
@@ -798,7 +801,7 @@ static int mdp5_plane_mode_set(struct drm_plane *plane,
hflip = !!(rotation & DRM_REFLECT_X);
vflip = !!(rotation & DRM_REFLECT_Y);
- spin_lock_irqsave(&hwpipe->pipe_lock, flags);
+ spin_lock_irqsave(&mdp5_plane->pipe_lock, flags);
mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_IMG_SIZE(pipe),
MDP5_PIPE_SRC_IMG_SIZE_WIDTH(min(fb->width, src_w)) |
@@ -877,7 +880,7 @@ static int mdp5_plane_mode_set(struct drm_plane *plane,
set_scanout_locked(plane, fb);
- spin_unlock_irqrestore(&hwpipe->pipe_lock, flags);
+ spin_unlock_irqrestore(&mdp5_plane->pipe_lock, flags);
return ret;
}
@@ -998,6 +1001,8 @@ struct drm_plane *mdp5_plane_init(struct drm_device *dev,
mdp5_plane->nformats = mdp_get_formats(mdp5_plane->formats,
ARRAY_SIZE(mdp5_plane->formats), false);
+ spin_lock_init(&mdp5_plane->pipe_lock);
+
if (type == DRM_PLANE_TYPE_CURSOR)
ret = drm_universal_plane_init(dev, plane, 0xff,
&mdp5_cursor_plane_funcs,