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author | Abhinav Kumar <abhinavk@codeaurora.org> | 2018-06-07 13:50:29 -0700 |
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committer | Sean Paul <seanpaul@chromium.org> | 2018-07-26 10:40:15 -0400 |
commit | 2d0b10fc5111bb4a902e9be378496d04c401ab81 (patch) | |
tree | 252ad33176f951e4297d60e8107ffc79e093ef96 /drivers/gpu/drm/msm/hdmi | |
parent | bb676df12b5e81cab57d1a212a6e9cfc343875a7 (diff) |
drm/msm: higher values of pclk can exceed 32 bits when multiplied by a factor
Make the pclk_rate u64 to accommodate higher pixel clock
rates.
Changes in v3:
- Converted pclk_rate to u32 (Archit)
- Rebase on dsi cleanup set in msm-next
Cc: Sibi Sankar <sibis@codeaurora.org>
Cc: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/hdmi')
0 files changed, 0 insertions, 0 deletions