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| author | Rob Clark <robdclark@gmail.com> | 2018-07-03 08:14:32 -0400 |
|---|---|---|
| committer | Rob Clark <robdclark@gmail.com> | 2018-07-25 07:51:04 -0400 |
| commit | 6e8bed6a3e2fd6f1e82ea9b1f705bbc82060a2b7 (patch) | |
| tree | d364cf453c0ac536e33fc993c6e0b43c950f0955 /drivers/gpu/drm/msm/dsi/dsi_host.c | |
| parent | 64709686dbb38f32045e117ec5a1aaf2e3a0a3c4 (diff) | |
drm/msm/mdp5: fix missing CTL flush
f9cb8d8d836e fixed various race conditions with CTL flush, in particular
flushing and sending the START signal before encoder state was updated.
But it did this a little too well in some cases that don't trigger
encoder->enable(), and CTL[n].FLUSH would never be set. When page flips
happen it would paper over the bug, since the first plag flip would
flush out the state to the hardware.
The issue could be reproduced with, for example, modetest (without the
'-v' argument).
Fixes: f9cb8d8d836e drm/msm/mdp5: rework CTL START signal handling
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/dsi/dsi_host.c')
0 files changed, 0 insertions, 0 deletions