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authoryt.shen@mediatek.com <yt.shen@mediatek.com>2017-03-31 19:30:37 +0800
committerCK Hu <ck.hu@mediatek.com>2017-04-08 00:02:16 +0800
commit2d52bfba09d18c9b67fa68cac4a6deeceeb6b375 (patch)
treea6fd188b3014a8e206068cd1d88222bd35929893 /drivers/gpu/drm/mediatek/mtk_dsi.c
parent21898816831fc60c92dd634ab4316a24da7eb4af (diff)
drm/mediatek: add non-continuous clock mode and EOT packet control
This patch will update dsi clock control method. 1. dsi non-continue clock mode will enhance antistatic effect for panel 2. EOT packet control will judge whether dsi send end of packet or not by customize Signed-off-by: shaoming chen <shaoming.chen@mediatek.com> Signed-off-by: YT Shen <yt.shen@mediatek.com> Acked-by: CK Hu <ck.hu@mediatek.com>
Diffstat (limited to 'drivers/gpu/drm/mediatek/mtk_dsi.c')
-rw-r--r--drivers/gpu/drm/mediatek/mtk_dsi.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
index 2e2cc3a15cb6..09528e2e69aa 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -431,6 +431,9 @@ static void mtk_dsi_rxtx_control(struct mtk_dsi *dsi)
break;
}
+ tmp_reg |= (dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) << 6;
+ tmp_reg |= (dsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET) >> 3;
+
writel(tmp_reg, dsi->regs + DSI_TXRX_CTRL);
}