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authorEugeni Dodonov <eugeni.dodonov@intel.com>2012-03-29 12:32:25 -0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-04-09 18:04:00 +0200
commite411b2c116626e685fb96cad84a902a12b1689f5 (patch)
tree5d38285dcacd64bd05a01fdff3309594a2e3394b /drivers/gpu/drm/i915
parent0e87f6679807a60efd3280c99544b6997916e987 (diff)
drm/i915: add DP_TP_STATUS registers
There is one set of those registers for each port. Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b49775326fb4..5b1710100963 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4078,4 +4078,12 @@
#define DP_TP_CTL_LINK_TRAIN_PAT2 (1<<8)
#define DP_TP_CTL_LINK_TRAIN_NORMAL (3<<8)
+/* DisplayPort Transport Status */
+#define DP_TP_STATUS_A 0x64044
+#define DP_TP_STATUS_B 0x64144
+#define DP_TP_STATUS(port) _PORT(port, \
+ DP_TP_STATUS_A, \
+ DP_TP_STATUS_B)
+#define DP_TP_STATUS_AUTOTRAIN_DONE (1<<12)
+
#endif /* _I915_REG_H_ */