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authorJesse Barnes <jbarnes@virtuousgeek.org>2011-04-06 14:54:44 -0700
committerKeith Packard <keithp@keithp.com>2011-05-13 17:10:33 -0700
commit65d3eb1e065c5e558a584fabe583daa5fdd63b75 (patch)
tree4aa8cf280b1b419e7f0f4f442961317ca9cce2f2 /drivers/gpu/drm/i915
parent51d56126a25280c2dfca6bd7f68a4e8183b679b1 (diff)
drm/i915: ring support for Ivy Bridge
Use Sandy Bridge paths in a few places. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index bf63869f6a07..12c168f0cb77 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -286,7 +286,7 @@ static int init_render_ring(struct intel_ring_buffer *ring)
if (INTEL_INFO(dev)->gen > 3) {
int mode = VS_TIMER_DISPATCH << 16 | VS_TIMER_DISPATCH;
- if (IS_GEN6(dev))
+ if (IS_GEN6(dev) || IS_GEN7(dev))
mode |= MI_FLUSH_ENABLE << 16 | MI_FLUSH_ENABLE;
I915_WRITE(MI_MODE, mode);
}
@@ -552,7 +552,7 @@ render_ring_put_irq(struct intel_ring_buffer *ring)
void intel_ring_setup_status_page(struct intel_ring_buffer *ring)
{
drm_i915_private_t *dev_priv = ring->dev->dev_private;
- u32 mmio = IS_GEN6(ring->dev) ?
+ u32 mmio = (IS_GEN6(ring->dev) || IS_GEN7(ring->dev)) ?
RING_HWS_PGA_GEN6(ring->mmio_base) :
RING_HWS_PGA(ring->mmio_base);
I915_WRITE(mmio, (u32)ring->status_page.gfx_addr);
@@ -1334,7 +1334,7 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
drm_i915_private_t *dev_priv = dev->dev_private;
struct intel_ring_buffer *ring = &dev_priv->ring[VCS];
- if (IS_GEN6(dev))
+ if (IS_GEN6(dev) || IS_GEN7(dev))
*ring = gen6_bsd_ring;
else
*ring = bsd_ring;