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authorUma Shankar <uma.shankar@intel.com>2020-07-16 20:28:57 +0530
committerRodrigo Vivi <rodrigo.vivi@intel.com>2020-08-17 16:16:19 -0400
commit2982ded2ff5ce0cf1a49bc39a526da182782b664 (patch)
tree62e2ab89aab29c7f4f80a0686e0ca50d6eebdb19 /drivers/gpu/drm/i915
parentc746063ab14644592abfb61be3486989ff990cea (diff)
drm/i915/display/fbc: Disable fbc by default on TGL
Fbc is causing random underruns in CI execution on TGL platforms. Disabling the same while the problem is being debugged and analyzed. v2: Moved the check below the module param check (Ville) Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Uma Shankar <uma.shankar@intel.com> Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200716145857.6911-1-uma.shankar@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r--drivers/gpu/drm/i915/display/intel_fbc.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 3a4f980788a6..195b8be4532a 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1426,6 +1426,13 @@ static int intel_sanitize_fbc_option(struct drm_i915_private *dev_priv)
if (!HAS_FBC(dev_priv))
return 0;
+ /*
+ * Fbc is causing random underruns in CI execution on TGL platforms.
+ * Disabling the same while the problem is being debugged and analyzed.
+ */
+ if (IS_TIGERLAKE(dev_priv))
+ return 0;
+
if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9)
return 1;