diff options
| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2012-05-04 17:18:18 -0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-05-08 14:04:15 +0200 |
| commit | 1d4f85ac2d5ef1892deba2a3df8a5695645418c8 (patch) | |
| tree | 909067c5548216bc5d2406be74901729d2070986 /drivers/gpu/drm/i915 | |
| parent | 22509ec8676fdbba8da525b9ec9cb3ddb4cb71b0 (diff) | |
drm/i915: start writing infoframes at address 0 on gen 4
Make sure we're doing the right thing, just like we do on gen5+.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_hdmi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index b84d19d0eaed..af88313d72d0 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -132,7 +132,7 @@ static void i9xx_write_infoframe(struct drm_encoder *encoder, else return; - val &= ~VIDEO_DIP_SELECT_MASK; + val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */ val |= intel_infoframe_index(frame); val |= VIDEO_DIP_ENABLE; |