summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/intel_overlay.c
diff options
context:
space:
mode:
authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-01-28 23:48:46 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-02-10 17:43:49 +0100
commit75c13993db592343bda1fd62f2555fea037d56bd (patch)
treee21d84f7ac42b4173a3b5be45b20355cab995b23 /drivers/gpu/drm/i915/intel_overlay.c
parentc3febcc438ba0878b164c74310bd77c50dbb0ba8 (diff)
drm/i915: fixup overlay checks for interlaced modes
The drm core _really_ likes to frob around with the crtc timings and put halfed vertical timings (in fields) in there. Which confuses the overlay code, resulting in it's refusal to display anything at the lower half of an interlaced pipe. Tested-by: Christopher Egert <cme3000@gmail.com> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_overlay.c')
-rw-r--r--drivers/gpu/drm/i915/intel_overlay.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 5542e9006f96..91d294e74ac8 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -937,10 +937,10 @@ static int check_overlay_dst(struct intel_overlay *overlay,
{
struct drm_display_mode *mode = &overlay->crtc->base.mode;
- if (rec->dst_x < mode->crtc_hdisplay &&
- rec->dst_x + rec->dst_width <= mode->crtc_hdisplay &&
- rec->dst_y < mode->crtc_vdisplay &&
- rec->dst_y + rec->dst_height <= mode->crtc_vdisplay)
+ if (rec->dst_x < mode->hdisplay &&
+ rec->dst_x + rec->dst_width <= mode->hdisplay &&
+ rec->dst_y < mode->vdisplay &&
+ rec->dst_y + rec->dst_height <= mode->vdisplay)
return 0;
else
return -EINVAL;