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authorJesse Barnes <jbarnes@virtuousgeek.org>2010-09-08 12:42:05 -0700
committerChris Wilson <chris@chris-wilson.co.uk>2010-09-08 21:20:27 +0100
commit2c9d97545914cc764786702f361a1f1c9bb8dfa9 (patch)
tree95d146695574e532b807bdd1a1e17432c53f3577 /drivers/gpu/drm/i915/intel_dp.c
parent3ba5c569c4a99c43bdac9f0c1c65e15a7b3390b9 (diff)
drm/i915: make sure panel is sequenced off when starting a mode set
Otherwise we may not be able to train the DP link. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index bcd81f96fc7f..27805a9ca877 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -894,6 +894,7 @@ static void intel_dp_prepare(struct drm_encoder *encoder)
uint32_t dp_reg = I915_READ(intel_dp->output_reg);
if (IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp)) {
+ ironlake_edp_panel_off(dev);
ironlake_edp_backlight_off(dev);
ironlake_edp_panel_vdd_on(dev);
ironlake_edp_pll_on(encoder);