summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/intel_device_info.h
diff options
context:
space:
mode:
authorDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>2020-07-07 17:39:47 -0700
committerChris Wilson <chris@chris-wilson.co.uk>2020-07-08 21:07:11 +0100
commit792592e72aba4162c35cd3155d4d5b99d5fb5762 (patch)
tree1563698d4e077f42ea7e40608d572ba401376850 /drivers/gpu/drm/i915/intel_device_info.h
parentf6beb38100778b7b2b18900b039dcb5118714a0a (diff)
drm/i915: Move the engine mask to intel_gt_info
Since the engines belong to the GT, move the runtime-updated list of available engines to the intel_gt struct. The original mask has been renamed to indicate it contains the maximum engine list that can be found on a matching device. In preparation for other info being moved to the gt in follow up patches (sseu), introduce an intel_gt_info structure to group all gt-related runtime info. v2: s/max_engine_mask/platform_engine_mask (tvrtko), fix selftest Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Andi Shyti <andi.shyti@intel.com> Cc: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> #v1 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200708003952.21831-5-daniele.ceraolospurio@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_device_info.h')
-rw-r--r--drivers/gpu/drm/i915/intel_device_info.h7
1 files changed, 1 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index fa60fdc1d75a..b010b6728432 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -157,7 +157,7 @@ struct intel_device_info {
u8 gen;
u8 gt; /* GT number, 0 if undefined */
- intel_engine_mask_t engine_mask; /* Engines supported by the HW */
+ intel_engine_mask_t platform_engine_mask; /* Engines supported by the HW */
enum intel_platform platform;
@@ -219,8 +219,6 @@ struct intel_runtime_info {
u8 num_sprites[I915_MAX_PIPES];
u8 num_scalers[I915_MAX_PIPES];
- u8 num_engines;
-
/* Slice/subslice/EU info */
struct sseu_dev_info sseu;
@@ -228,9 +226,6 @@ struct intel_runtime_info {
u32 cs_timestamp_frequency_hz;
u32 cs_timestamp_period_ns;
-
- /* Media engine access to SFC per instance */
- u8 vdbox_sfc_access;
};
struct intel_driver_caps {