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| author | Lucas De Marchi <lucas.demarchi@intel.com> | 2020-02-24 11:12:58 -0800 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2020-03-02 12:10:12 +0200 |
| commit | eddf309a8ed42eb3312b17a6934686b018189cd3 (patch) | |
| tree | b7c001393cdf7e4899956cacb54de3505949016a /drivers/gpu/drm/i915/i915_sysfs.h | |
| parent | 4c116e1ae43955a0a38555dfd4d136a222a8996b (diff) | |
drm/i915/tgl: Add Wa_1608008084
Wa_1608008084 is an additional WA that applies to writes on FF_MODE2
register. We can't read it back either from CPU or GPU. Since the other
bits should be 0, recommendation to handle Wa_1604555607 is to actually
just write the timer value.
Do a write only and don't try to read it, neither before or after
the WA is applied.
Fixes: ff690b2111ba ("drm/i915/tgl: Implement Wa_1604555607")
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200224191258.15668-1-lucas.demarchi@intel.com
(cherry picked from commit e94bda14325ccf1a519ffb516738d1201457f97f)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_sysfs.h')
0 files changed, 0 insertions, 0 deletions